1. Field of the Invention
This invention relates to a method for fabricating on-chip decoupling capacitor and more particularly to a method of this kind wherein both lead-frame and semiconductor chip can be used as each electrode of capacitor, thus maximizing the capacity of decoupling capacitor.
2. Description of the Prior Art
Generally, the decoupling capacitor is formed on the upper part of semiconductor chip by the process of MOS transistor in order to remove any noise generated within the chip. The noise value.DELTA.V is given by ##EQU1## where V.sub.DD is the source voltage, v ms the noise voltage, C is a total capacitor in semiconductor chip, and C.sub.D is the on-chip decoupling capacitance. To minimize noise value V from above equation (1), the value of C.sub.D must be enlarged. The value of C.sub.D is given by ##EQU2## where .epsilon.o is the dielectric constant in vacuum, .epsilon.ox is the dielectric constant of dielectric, D.sub.c.sup.2 is the capacitor area, and H is the thickness of dielectric. To increase the value of C.sub.D from equation (2), D.sub.c.sup.2 must be enlarged. In the past, the on-chip decoupling capacitors were recognized to be disadvantageous in that their occupation on the upper part of semiconductor chip made their chip size larger, and there was no space sufficient enough to accommodate the capacitor with a large capacity.